%0 Conference Paper %1 conf/vts/HasibCADST18 %A Hasib, Omar Al-Terkawi %A Crepeau, Daniel %A Awad, Thomas %A Dulipovici, Andrei %A Savaria, Yvon %A Thibeault, Claude %B VTS %D 2018 %I IEEE Computer Society %K dblp %P 1-6 %T Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits. %U http://dblp.uni-trier.de/db/conf/vts/vts2018.html#HasibCADST18 %@ 978-1-5386-3774-6

@inproceedings{conf/vts/HasibCADST18, added-at = {2023-03-24T00:00:00.000+0100}, author = {Hasib, Omar Al-Terkawi and Crepeau, Daniel and Awad, Thomas and Dulipovici, Andrei and Savaria, Yvon and Thibeault, Claude}, biburl = {https://www.bibsonomy.org/bibtex/29b6339cc07bff911d68d2f6fd9571cca/dblp}, booktitle = {VTS}, crossref = {conf/vts/2018}, ee = {https://doi.ieeecomputersociety.org/10.1109/VTS.2018.8368637}, interhash = {85db11e33b53122a63ff67e03eb41634}, intrahash = {9b6339cc07bff911d68d2f6fd9571cca}, isbn = {978-1-5386-3774-6}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T19:42:12.000+0200}, title = {Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits.}, url = {http://dblp.uni-trier.de/db/conf/vts/vts2018.html#HasibCADST18}, year = 2018 }