%0 Conference Paper %1 conf/asicon/HuangRLZWXL11 %A Huang, Haocheng %A Ruan, Aiwu %A Liao, Yongbo %A Zhu, Jianhua %A Wang, Lin %A Xiang, Chuanyin %A Li, Pin %B ASICON %D 2011 %I IEEE %K %P 373-376 %T A new event driven testbench synthesis engine for FPGA emulation. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2011.html#HuangRLZWXL11 %@ 978-1-61284-192-2

@inproceedings{conf/asicon/HuangRLZWXL11, added-at = {2023-12-13T02:58:05.000+0100}, author = {Huang, Haocheng and Ruan, Aiwu and Liao, Yongbo and Zhu, Jianhua and Wang, Lin and Xiang, Chuanyin and Li, Pin}, biburl = {https://www.bibsonomy.org/bibtex/22ef8a26551c3b2a6e8ad284f3517f429/admin}, booktitle = {ASICON}, crossref = {conf/asicon/2011}, ee = {http://dx.doi.org/10.1109/ASICON.2011.6157199}, interhash = {85e3d0e23dfec4b219fbe205ccd0c181}, intrahash = {2ef8a26551c3b2a6e8ad284f3517f429}, isbn = {978-1-61284-192-2}, keywords = {}, pages = {373-376}, publisher = {IEEE}, timestamp = {2023-12-13T02:58:05.000+0100}, title = {A new event driven testbench synthesis engine for FPGA emulation.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2011.html#HuangRLZWXL11}, year = 2011 }