@inproceedings{conf/esscirc/ChienYCCCCWLLLL15,
added-at = {2019-09-16T00:00:00.000+0200},
author = {Chien, Meng-Wei and Yang, Wen-Hau and Chou, Ying-Wei and Chen, Hsin-Chieh and Chen, Wei-Chung and Chen, Ke-Horng and Wey, Chin-Long and Lai, Shin-Chi and Lin, Ying-Hsi and Lee, Chao-Cheng and Lin, Jian-Ru and Tsai, Tsung-Yen and Luo, Hsin-Yu},
biburl = {https://www.bibsonomy.org/bibtex/2d75e8890798576b6f5187fad85e1ea05/dblp},
booktitle = {ESSCIRC},
crossref = {conf/esscirc/2015},
editor = {Pribyl, Wolfgang and Dielacher, Franz and Hueber, Gernot},
ee = {https://doi.org/10.1109/ESSCIRC.2015.7313860},
interhash = {8b9f66189a1ba1f67503782433921a55},
intrahash = {d75e8890798576b6f5187fad85e1ea05},
isbn = {978-1-4673-7472-9},
keywords = {dblp},
pages = {188-191},
publisher = {IEEE},
timestamp = {2019-10-17T20:56:58.000+0200},
title = {Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors.},
url = {http://dblp.uni-trier.de/db/conf/esscirc/esscirc2015.html#ChienYCCCCWLLLL15},
year = 2015
}