Article,

A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers.

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IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (9): 3352-3364 (2019)

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