%0 Conference Paper %1 conf/reconfig/SaldanaA05 %A Saldaña, Griselda %A Arias-Estrada, Miguel %B ReConFig %D 2005 %I IEEE Computer Society %K dblp %T FPGA-based customizable systolic architecture for image processing applications. %U http://dblp.uni-trier.de/db/conf/reconfig/reconfig2005.html#SaldanaA05 %@ 0-7695-2456-7

@inproceedings{conf/reconfig/SaldanaA05, added-at = {2023-03-23T00:00:00.000+0100}, author = {Saldaña, Griselda and Arias-Estrada, Miguel}, biburl = {https://www.bibsonomy.org/bibtex/236ed3fc3f18c47598e2a4abe603a3093/dblp}, booktitle = {ReConFig}, crossref = {conf/reconfig/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/RECONFIG.2005.20}, interhash = {907a1b3f7e564d537c49a734ef372940}, intrahash = {36ed3fc3f18c47598e2a4abe603a3093}, isbn = {0-7695-2456-7}, keywords = {dblp}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T12:17:05.000+0200}, title = {FPGA-based customizable systolic architecture for image processing applications.}, url = {http://dblp.uni-trier.de/db/conf/reconfig/reconfig2005.html#SaldanaA05}, year = 2005 }