%0 Conference Paper %1 conf/esscirc/MaKP11 %A Ma, Wei-Hsiang %A Kao, Jerry C. %A Papaefthymiou, Marios C. %B ESSCIRC %D 2011 %I IEEE %K dblp %P 155-158 %T A 5.5GS/s 28mW 5-bit flash ADC with resonant clock distribution. %U http://dblp.uni-trier.de/db/conf/esscirc/esscirc2011.html#MaKP11 %@ 978-1-4577-0703-2

@inproceedings{conf/esscirc/MaKP11, added-at = {2017-05-26T00:00:00.000+0200}, author = {Ma, Wei-Hsiang and Kao, Jerry C. and Papaefthymiou, Marios C.}, biburl = {https://www.bibsonomy.org/bibtex/2e7ae5274da18e1e3f29174552572ac28/dblp}, booktitle = {ESSCIRC}, crossref = {conf/esscirc/2011}, ee = {https://doi.org/10.1109/ESSCIRC.2011.6044888}, interhash = {911733f5f199556e9273e53e64c9dfbf}, intrahash = {e7ae5274da18e1e3f29174552572ac28}, isbn = {978-1-4577-0703-2}, keywords = {dblp}, pages = {155-158}, publisher = {IEEE}, timestamp = {2019-10-17T20:56:32.000+0200}, title = {A 5.5GS/s 28mW 5-bit flash ADC with resonant clock distribution.}, url = {http://dblp.uni-trier.de/db/conf/esscirc/esscirc2011.html#MaKP11}, year = 2011 }