%0 Journal Article %1 journals/tcas/PuglieseACC09 %A Pugliese, Andrea %A Amoroso, Francesco A. %A Cappuccino, Gregorio %A Cocorullo, Giuseppe %D 2009 %J IEEE Trans. Circuits Syst. I Regul. Pap. %K dblp %N 12 %P 2569-2582 %T Settling Time Optimization for Three-Stage CMOS Amplifier Topologies. %U http://dblp.uni-trier.de/db/journals/tcas/tcasI56.html#PuglieseACC09 %V 56-I

@article{journals/tcas/PuglieseACC09, added-at = {2020-05-22T00:00:00.000+0200}, author = {Pugliese, Andrea and Amoroso, Francesco A. and Cappuccino, Gregorio and Cocorullo, Giuseppe}, biburl = {https://www.bibsonomy.org/bibtex/25705345013463949ca66473a22272bf7/dblp}, ee = {https://doi.org/10.1109/TCSI.2009.2017133}, interhash = {921f86cf2d8193a81ad62f086f1d68c4}, intrahash = {5705345013463949ca66473a22272bf7}, journal = {IEEE Trans. Circuits Syst. I Regul. Pap.}, keywords = {dblp}, number = 12, pages = {2569-2582}, timestamp = {2020-05-23T12:29:50.000+0200}, title = {Settling Time Optimization for Three-Stage CMOS Amplifier Topologies.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasI56.html#PuglieseACC09}, volume = {56-I}, year = 2009 }