%0 Conference Paper %1 conf/icecsys/KuriharaIIA07 %A Kurihara, Kenichiro %A Iizuka, Tetsuya %A Ikeda, Makoto %A Asada, Kunihiro %B ICECS %D 2007 %I IEEE %K dblp %P 1296-1299 %T Process Variation Aware Comprehensive Layout Synthesis for Yield Enhancement in Nano-meter CMOS. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys2007.html#KuriharaIIA07 %@ 978-1-4244-1377-5

@inproceedings{conf/icecsys/KuriharaIIA07, added-at = {2017-05-23T00:00:00.000+0200}, author = {Kurihara, Kenichiro and Iizuka, Tetsuya and Ikeda, Makoto and Asada, Kunihiro}, biburl = {https://www.bibsonomy.org/bibtex/200e00f9ed9a8022f1f4b3932a26c9aac/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/2007}, ee = {https://doi.org/10.1109/ICECS.2007.4511235}, interhash = {9337d775531e256f470dfd1eaabd49f8}, intrahash = {00e00f9ed9a8022f1f4b3932a26c9aac}, isbn = {978-1-4244-1377-5}, keywords = {dblp}, pages = {1296-1299}, publisher = {IEEE}, timestamp = {2019-10-17T19:51:11.000+0200}, title = {Process Variation Aware Comprehensive Layout Synthesis for Yield Enhancement in Nano-meter CMOS.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2007.html#KuriharaIIA07}, year = 2007 }