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%0 Journal Article
%1 journals/tvlsi/HoACYCLP13
%A Ho, S. Man Ho
%A Ai, Yanqing
%A Chau, Thomas Chun-Pong
%A Yuen, Steve C. L.
%A sing Choy, Oliver Chiu
%A Leong, Philip Heng Wai
%A Pun, Kong-Pang
%D 2013
%J IEEE Trans. Very Large Scale Integr. Syst.
%K dblp
%N 3
%P 424-433
%T Architecture and Design Flow for a Highly Efficient Structured ASIC.
%U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi21.html#HoACYCLP13
%V 21
@article{journals/tvlsi/HoACYCLP13,
added-at = {2022-10-18T00:00:00.000+0200},
author = {Ho, S. Man Ho and Ai, Yanqing and Chau, Thomas Chun-Pong and Yuen, Steve C. L. and sing Choy, Oliver Chiu and Leong, Philip Heng Wai and Pun, Kong-Pang},
biburl = {https://www.bibsonomy.org/bibtex/2e87335995ec53f4576e2610e4308e7a7/dblp},
ee = {https://doi.org/10.1109/TVLSI.2012.2190478},
interhash = {985d1b3ac67a970b7eb35a33a895d04d},
intrahash = {e87335995ec53f4576e2610e4308e7a7},
journal = {IEEE Trans. Very Large Scale Integr. Syst.},
keywords = {dblp},
number = 3,
pages = {424-433},
timestamp = {2024-04-08T14:32:20.000+0200},
title = {Architecture and Design Flow for a Highly Efficient Structured ASIC.},
url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi21.html#HoACYCLP13},
volume = 21,
year = 2013
}
