%0 Conference Paper %1 conf/vlsid/CataniaR95 %A Catania, Vincenzo %A Russo, Marco %B VLSI Design %D 1995 %I IEEE Computer Society %K dblp %P 299-304 %T Analog gates for a VLSI fuzzy processor. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1995.html#CataniaR95 %@ 0-8186-6905-5

@inproceedings{conf/vlsid/CataniaR95, added-at = {2023-03-24T00:00:00.000+0100}, author = {Catania, Vincenzo and Russo, Marco}, biburl = {https://www.bibsonomy.org/bibtex/2cd274a21be893721d232acbaf8d675a4/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1995}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1995.512128}, interhash = {98bff7786d7c5030dd96824aa1e4bc9e}, intrahash = {cd274a21be893721d232acbaf8d675a4}, isbn = {0-8186-6905-5}, keywords = {dblp}, pages = {299-304}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:46:44.000+0200}, title = {Analog gates for a VLSI fuzzy processor.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1995.html#CataniaR95}, year = 1995 }