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%0 Conference Paper
%1 conf/msml/AadithyaKPBLMMK20
%A Aadithya, Karthik V.
%A Kuberry, Paul
%A Paskaleva, Biliana S.
%A Bochev, Pavel B.
%A Leeson, K.
%A Mar, A.
%A Mei, Ting
%A Keiter, Eric R.
%B MSML
%D 2020
%E Lu, Jianfeng
%E Ward, Rachel A.
%I PMLR
%K dblp
%P 555-569
%T Data-driven Compact Models for Circuit Design and Analysis.
%U http://dblp.uni-trier.de/db/conf/msml/msml2020.html#AadithyaKPBLMMK20
%V 107
@inproceedings{conf/msml/AadithyaKPBLMMK20,
added-at = {2020-12-15T00:00:00.000+0100},
author = {Aadithya, Karthik V. and Kuberry, Paul and Paskaleva, Biliana S. and Bochev, Pavel B. and Leeson, K. and Mar, A. and Mei, Ting and Keiter, Eric R.},
biburl = {https://www.bibsonomy.org/bibtex/2612d9592ef9ce6e9c05556d8b9494619/dblp},
booktitle = {MSML},
crossref = {conf/msml/2020},
editor = {Lu, Jianfeng and Ward, Rachel A.},
ee = {http://proceedings.mlr.press/v107/aadithya20a.html},
interhash = {198f16600d6faf6959cee9bc85df909d},
intrahash = {612d9592ef9ce6e9c05556d8b9494619},
keywords = {dblp},
pages = {555-569},
publisher = {PMLR},
series = {Proceedings of Machine Learning Research},
timestamp = {2024-04-10T01:52:51.000+0200},
title = {Data-driven Compact Models for Circuit Design and Analysis.},
url = {http://dblp.uni-trier.de/db/conf/msml/msml2020.html#AadithyaKPBLMMK20},
volume = 107,
year = 2020
}
