%0 Conference Paper %1 conf/aspdac/HigamiTKS11 %A Higami, Yoshinobu %A Takahashi, Hiroshi %A ya Kobayashi, Shin %A Saluja, Kewal K. %B ASP-DAC %D 2011 %I IEEE %K dblp %P 799-805 %T Fault simulation and test generation for clock delay faults. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2011.html#HigamiTKS11 %@ 978-1-4244-7516-2

@inproceedings{conf/aspdac/HigamiTKS11, added-at = {2017-05-26T00:00:00.000+0200}, author = {Higami, Yoshinobu and Takahashi, Hiroshi and ya Kobayashi, Shin and Saluja, Kewal K.}, biburl = {https://www.bibsonomy.org/bibtex/2363efe89d3a88ed3c8b02d63c02c738b/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2011}, ee = {http://dl.acm.org/citation.cfm?id=1950967}, interhash = {9a2846568a2bd9ee85bfe3a3e75f8657}, intrahash = {363efe89d3a88ed3c8b02d63c02c738b}, isbn = {978-1-4244-7516-2}, keywords = {dblp}, pages = {799-805}, publisher = {IEEE}, timestamp = {2019-10-17T16:43:25.000+0200}, title = {Fault simulation and test generation for clock delay faults.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2011.html#HigamiTKS11}, year = 2011 }