%0 Conference Paper %1 conf/isscc/LeeW16 %A Lee, Edward H. %A Wong, S. Simon %B ISSCC %D 2016 %I IEEE %K dblp %P 418-419 %T 24.2 A 2.5GHz 7.7TOPS/W switched-capacitor matrix multiplier with co-designed local memory in 40nm. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2016.html#LeeW16 %@ 978-1-4673-9467-3

@inproceedings{conf/isscc/LeeW16, added-at = {2016-03-02T00:00:00.000+0100}, author = {Lee, Edward H. and Wong, S. Simon}, biburl = {https://www.bibsonomy.org/bibtex/2a2f2519dd4c045d3bcd5455a4df4dc82/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2016}, ee = {http://dx.doi.org/10.1109/ISSCC.2016.7418085}, interhash = {9b926011824420e9cdb1e33a5694647a}, intrahash = {a2f2519dd4c045d3bcd5455a4df4dc82}, isbn = {978-1-4673-9467-3}, keywords = {dblp}, pages = {418-419}, publisher = {IEEE}, timestamp = {2016-03-03T11:43:08.000+0100}, title = {24.2 A 2.5GHz 7.7TOPS/W switched-capacitor matrix multiplier with co-designed local memory in 40nm.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2016.html#LeeW16}, year = 2016 }