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%0 Journal Article
%1 journals/jssc/PageC98
%A Page, Kevin J.
%A Chau, Paul M.
%D 1998
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 151-155
%T Improved architectures for the add-compare-select operation in long constraint length Viterbi decoding.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc33.html#PageC98
%V 33
@article{journals/jssc/PageC98,
added-at = {2022-07-05T00:00:00.000+0200},
author = {Page, Kevin J. and Chau, Paul M.},
biburl = {https://www.bibsonomy.org/bibtex/23e67f8c84e11bb66ca56f59fb2f87406/dblp},
ee = {https://doi.org/10.1109/4.654948},
interhash = {9ed05df3a9b1f73d81bb8fa81b29f77f},
intrahash = {3e67f8c84e11bb66ca56f59fb2f87406},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {151-155},
timestamp = {2024-04-08T10:43:34.000+0200},
title = {Improved architectures for the add-compare-select operation in long constraint length Viterbi decoding.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc33.html#PageC98},
volume = 33,
year = 1998
}