%0 Conference Paper %1 conf/iscas/NakaoaWKY95 %A Nakaoa, Toshihiro %A Wakabayashi, Shin'ichi %A Koide, Tetsushi %A Yoshida, Noriyoshi %B ISCAS %D 1995 %I IEEE %K dblp %P 1920-1923 %T A Verification Algorithm for Logic Circuits with Internal Variables. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1995-3.html#NakaoaWKY95 %@ 0-7803-2570-2

@inproceedings{conf/iscas/NakaoaWKY95, added-at = {2016-05-23T00:00:00.000+0200}, author = {Nakaoa, Toshihiro and Wakabayashi, Shin'ichi and Koide, Tetsushi and Yoshida, Noriyoshi}, biburl = {https://www.bibsonomy.org/bibtex/2c72da7ac698a80462abf20da77ff8902/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/1995}, ee = {http://dx.doi.org/10.1109/ISCAS.1995.523794}, interhash = {a1ad1db48d485d70132b65fcbababf2c}, intrahash = {c72da7ac698a80462abf20da77ff8902}, isbn = {0-7803-2570-2}, keywords = {dblp}, pages = {1920-1923}, publisher = {IEEE}, timestamp = {2016-05-24T11:54:04.000+0200}, title = {A Verification Algorithm for Logic Circuits with Internal Variables.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1995-3.html#NakaoaWKY95}, year = 1995 }