%0 Conference Paper %1 conf/isqed/LinWP14 %A Lin, Xue %A Wang, Yanzhi %A Pedram, Massoud %B ISQED %D 2014 %I IEEE %K dblp %P 341-348 %T Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime. %U http://dblp.uni-trier.de/db/conf/isqed/isqed2014.html#LinWP14 %@ 978-1-4799-3945-9

@inproceedings{conf/isqed/LinWP14, added-at = {2014-04-10T00:00:00.000+0200}, author = {Lin, Xue and Wang, Yanzhi and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/2cd2cc7da45ce6cada775025562d27996/dblp}, booktitle = {ISQED}, crossref = {conf/isqed/2014}, ee = {http://dx.doi.org/10.1109/ISQED.2014.6783346}, interhash = {a33683ff3db8ff1d027ad18df50ac52b}, intrahash = {cd2cc7da45ce6cada775025562d27996}, isbn = {978-1-4799-3945-9}, keywords = {dblp}, pages = {341-348}, publisher = {IEEE}, timestamp = {2015-06-18T23:43:00.000+0200}, title = {Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime.}, url = {http://dblp.uni-trier.de/db/conf/isqed/isqed2014.html#LinWP14}, year = 2014 }