%0 Conference Paper %1 conf/esscirc/PatelRYLCKYHE16 %A Patel, Harsh N. %A Roy, Abhishek %A Yahya, Farah B. %A Liu, Ningxi %A Calhoun, Benton H. %A Kumeno, Kazuyuki %A Yasuda, Makoto %A Harada, Akihiko %A Ema, Taiji %B ESSCIRC %D 2016 %I IEEE %K dblp %P 45-48 %T A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for energy minimization in subthreshold SRAM and logic. %U http://dblp.uni-trier.de/db/conf/esscirc/esscirc2016.html#PatelRYLCKYHE16 %@ 978-1-5090-2972-3

@inproceedings{conf/esscirc/PatelRYLCKYHE16, added-at = {2019-09-25T00:00:00.000+0200}, author = {Patel, Harsh N. and Roy, Abhishek and Yahya, Farah B. and Liu, Ningxi and Calhoun, Benton H. and Kumeno, Kazuyuki and Yasuda, Makoto and Harada, Akihiko and Ema, Taiji}, biburl = {https://www.bibsonomy.org/bibtex/2ac5a968eadd333f94a9f436290b7ce79/dblp}, booktitle = {ESSCIRC}, crossref = {conf/esscirc/2016}, ee = {https://doi.org/10.1109/ESSCIRC.2016.7598239}, interhash = {a41431ad20bbf942c948d988ae21af23}, intrahash = {ac5a968eadd333f94a9f436290b7ce79}, isbn = {978-1-5090-2972-3}, keywords = {dblp}, pages = {45-48}, publisher = {IEEE}, timestamp = {2019-10-17T20:57:15.000+0200}, title = {A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for energy minimization in subthreshold SRAM and logic.}, url = {http://dblp.uni-trier.de/db/conf/esscirc/esscirc2016.html#PatelRYLCKYHE16}, year = 2016 }