%0 Journal Article %1 journals/vlsisp/VishnoiMN16 %A Vishnoi, Upasna %A Meixner, Michael %A Noll, Tobias G. %D 2016 %J J. Signal Process. Syst. %K %N 3 %P 329-356 %T A Family of Modular QRD-Accelerator Architectures and Circuits Cross-Layer Optimized for High Area- and Energy-Efficiency. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp83.html#VishnoiMN16 %V 83

@article{journals/vlsisp/VishnoiMN16, added-at = {2023-12-13T05:35:49.000+0100}, author = {Vishnoi, Upasna and Meixner, Michael and Noll, Tobias G.}, biburl = {https://www.bibsonomy.org/bibtex/262b40f3a49196ae0f878c74d800bec55/admin}, ee = {https://doi.org/10.1007/s11265-015-0976-6}, interhash = {a4639a836ed810cdd39fc39c9ce2d390}, intrahash = {62b40f3a49196ae0f878c74d800bec55}, journal = {J. Signal Process. Syst.}, keywords = {}, number = 3, pages = {329-356}, timestamp = {2023-12-13T05:35:49.000+0100}, title = {A Family of Modular QRD-Accelerator Architectures and Circuits Cross-Layer Optimized for High Area- and Energy-Efficiency.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp83.html#VishnoiMN16}, volume = 83, year = 2016 }