%0 Journal Article %1 journals/esticas/AthmanathanSPPE16 %A Athmanathan, Aravinthan %A Stanisavljevic, Milos %A Papandreou, Nikolaos %A Pozidis, Haralampos %A Eleftheriou, Evangelos %D 2016 %J IEEE J. Emerg. Sel. Topics Circuits Syst. %K dblp %N 1 %P 87-100 %T Multilevel-Cell Phase-Change Memory: A Viable Technology. %U http://dblp.uni-trier.de/db/journals/esticas/esticas6.html#AthmanathanSPPE16 %V 6

@article{journals/esticas/AthmanathanSPPE16, added-at = {2016-03-14T00:00:00.000+0100}, author = {Athmanathan, Aravinthan and Stanisavljevic, Milos and Papandreou, Nikolaos and Pozidis, Haralampos and Eleftheriou, Evangelos}, biburl = {https://www.bibsonomy.org/bibtex/2d53015d93f6df2435004346a11345da5/dblp}, ee = {http://dx.doi.org/10.1109/JETCAS.2016.2528598}, interhash = {a9c4ed760c306c0f1a2f8165f6bd7ec4}, intrahash = {d53015d93f6df2435004346a11345da5}, journal = {IEEE J. Emerg. Sel. Topics Circuits Syst.}, keywords = {dblp}, number = 1, pages = {87-100}, timestamp = {2016-03-15T11:45:18.000+0100}, title = {Multilevel-Cell Phase-Change Memory: A Viable Technology.}, url = {http://dblp.uni-trier.de/db/journals/esticas/esticas6.html#AthmanathanSPPE16}, volume = 6, year = 2016 }