%0 Journal Article %1 journals/tvlsi/LeeTZBW17 %A Lee, Sae Kyu %A Tong, Tao %A Zhang, Xuan %A Brooks, David M. %A Wei, Gu-Yeon %D 2017 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 4 %P 1271-1284 %T A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC-DC Converter. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi25.html#LeeTZBW17 %V 25

@article{journals/tvlsi/LeeTZBW17, added-at = {2020-03-11T00:00:00.000+0100}, author = {Lee, Sae Kyu and Tong, Tao and Zhang, Xuan and Brooks, David M. and Wei, Gu-Yeon}, biburl = {https://www.bibsonomy.org/bibtex/218a8e113dba27b6fd0e6578b8b313141/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2016.2633805}, interhash = {aabd08385b71b76c3999fb71ef93ff2d}, intrahash = {18a8e113dba27b6fd0e6578b8b313141}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 4, pages = {1271-1284}, timestamp = {2020-03-12T11:41:15.000+0100}, title = {A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC-DC Converter.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi25.html#LeeTZBW17}, volume = 25, year = 2017 }