%0 Conference Paper %1 conf/vlsid/WangJRD03 %A Wang, Weidong %A Jha, Niraj K. %A Raghunathan, Anand %A Dey, Sujit %B VLSI Design %D 2003 %I IEEE Computer Society %K dblp %P 467-473 %T High-level Synthesis of Multi-process Behavioral Descriptions. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#WangJRD03 %@ 0-7695-1868-0

@inproceedings{conf/vlsid/WangJRD03, added-at = {2023-03-24T00:00:00.000+0100}, author = {Wang, Weidong and Jha, Niraj K. and Raghunathan, Anand and Dey, Sujit}, biburl = {https://www.bibsonomy.org/bibtex/25a2be79901598d0374b6aebe0dea29eb/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2003}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183178}, interhash = {acc0078ba5384836623d4410cf7836b6}, intrahash = {5a2be79901598d0374b6aebe0dea29eb}, isbn = {0-7695-1868-0}, keywords = {dblp}, pages = {467-473}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:49.000+0200}, title = {High-level Synthesis of Multi-process Behavioral Descriptions.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#WangJRD03}, year = 2003 }