%0 Conference Paper %1 conf/vlsid/MajhiA98 %A Majhi, Ananta K. %A Agrawal, Vishwani D. %B VLSI Design %D 1998 %I IEEE Computer Society %K dblp %P 285-288 %T Mixed-Signal Test. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1998.html#MajhiA98 %@ 0-8186-8224-8

@inproceedings{conf/vlsid/MajhiA98, added-at = {2023-03-24T00:00:00.000+0100}, author = {Majhi, Ananta K. and Agrawal, Vishwani D.}, biburl = {https://www.bibsonomy.org/bibtex/2fd10019c39afa92dad084b21d29aa8e5/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1998}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1998.646619}, interhash = {aeaaeb9ca8c89d4ee6b6659e619c52c4}, intrahash = {fd10019c39afa92dad084b21d29aa8e5}, isbn = {0-8186-8224-8}, keywords = {dblp}, pages = {285-288}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:47:35.000+0200}, title = {Mixed-Signal Test.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1998.html#MajhiA98}, year = 1998 }