%0 Journal Article %1 journals/jssc/HuangCSMPKS22 %A Huang, Chi-Hsiang %A Chen, Yidong %A Sun, Xun %A Mandal, Arindam %A Pamula, Venkata Rajesh %A Kurd, Nasser A. %A Sathe, Visvesh S. %D 2022 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 90-102 %T Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control. %U http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#HuangCSMPKS22 %V 57

@article{journals/jssc/HuangCSMPKS22, added-at = {2022-01-08T00:00:00.000+0100}, author = {Huang, Chi-Hsiang and Chen, Yidong and Sun, Xun and Mandal, Arindam and Pamula, Venkata Rajesh and Kurd, Nasser A. and Sathe, Visvesh S.}, biburl = {https://www.bibsonomy.org/bibtex/26fd5b2d53632bcc850479cd3ba420665/dblp}, ee = {https://doi.org/10.1109/JSSC.2021.3102603}, interhash = {b1d6486db4d4132aaecf194dacf1e7ad}, intrahash = {6fd5b2d53632bcc850479cd3ba420665}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {90-102}, timestamp = {2024-04-08T10:44:44.000+0200}, title = {Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#HuangCSMPKS22}, volume = 57, year = 2022 }