Article,
A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ.
D. Lee, J. Baek, H. Kwon, D. Kwon, C. Cho, S. Kim, D. An, C. Chang, U. Lim, J. Im, W. Sung, H. Kim, S. Park, H. Kim, H. Seol, J. Kim, J. Shin, G. Kang, Y. Kim, S. Kim, W. Park, S. Kim, C. Lee, S. Lee, T. Park, C. Oh, H. Ban, H. Ko, H. Song, T. Oh, S. Hwang, K. Oh, J. Choi, and J. Lee.IEEE J. Solid State Circuits, 58 (1): 279-290 (2023)
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- IEEE J. Solid State Circuits
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- 1
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- 279-290
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- 58
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- https://doi.org/10.1109/JSSC.2022.3222203
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%1 journals/jssc/LeeBKKCKACLISKP23
%A Lee, Daewoong
%A Baek, Jaehyeok
%A Kwon, Hye-Jung
%A Kwon, Daehyun
%A Cho, Chulhee
%A Kim, Sang-Hoon
%A An, Donggun
%A Chang, Chulsoon
%A Lim, Unhak
%A Im, Jiyeon
%A Sung, Wonju
%A Kim, Hye-Ran
%A Park, Sun-Young
%A Kim, Hyoung-Joo
%A Seol, Ho-Seok
%A Kim, Juhwan
%A Shin, Jung-Bum
%A Kang, Gil-Young
%A Kim, Yong-Hun
%A Kim, Sooyoung
%A Park, Wansoo
%A Kim, Seok-Jung
%A Lee, ChanYong
%A Lee, Seungseob
%A Park, TaeHoon
%A Oh, Chi-Sung
%A Ban, Hyodong
%A Ko, Hyungjong
%A Song, Hoyoung
%A Oh, Tae-Young
%A Hwang, SangJoon
%A Oh, Kyung Suk
%A Choi, Jung-Hwan
%A Lee, Jooyoung
%D 2023
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 279-290
%T A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#LeeBKKCKACLISKP23
%V 58
@article{journals/jssc/LeeBKKCKACLISKP23,
added-at = {2023-01-15T00:00:00.000+0100},
author = {Lee, Daewoong and Baek, Jaehyeok and Kwon, Hye-Jung and Kwon, Daehyun and Cho, Chulhee and Kim, Sang-Hoon and An, Donggun and Chang, Chulsoon and Lim, Unhak and Im, Jiyeon and Sung, Wonju and Kim, Hye-Ran and Park, Sun-Young and Kim, Hyoung-Joo and Seol, Ho-Seok and Kim, Juhwan and Shin, Jung-Bum and Kang, Gil-Young and Kim, Yong-Hun and Kim, Sooyoung and Park, Wansoo and Kim, Seok-Jung and Lee, ChanYong and Lee, Seungseob and Park, TaeHoon and Oh, Chi-Sung and Ban, Hyodong and Ko, Hyungjong and Song, Hoyoung and Oh, Tae-Young and Hwang, SangJoon and Oh, Kyung Suk and Choi, Jung-Hwan and Lee, Jooyoung},
biburl = {https://www.bibsonomy.org/bibtex/28feb2029e1889f03ebbbf2321a24b71b/dblp},
ee = {https://doi.org/10.1109/JSSC.2022.3222203},
interhash = {b2e8ef9af630731de23e5aa1c421d4b9},
intrahash = {8feb2029e1889f03ebbbf2321a24b71b},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {279-290},
timestamp = {2024-04-08T10:43:12.000+0200},
title = {A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#LeeBKKCKACLISKP23},
volume = 58,
year = 2023
}