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%0 Journal Article
%1 journals/ieicet/HigamiWTKS17
%A Higami, Yoshinobu
%A Wang, Senling
%A Takahashi, Hiroshi
%A ya Kobayashi, Shin
%A Saluja, Kewal K.
%D 2017
%J IEICE Trans. Inf. Syst.
%K dblp
%N 9
%P 2224-2227
%T A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line.
%U http://dblp.uni-trier.de/db/journals/ieicet/ieicet100d.html#HigamiWTKS17
%V 100-D
@article{journals/ieicet/HigamiWTKS17,
added-at = {2020-06-15T00:00:00.000+0200},
author = {Higami, Yoshinobu and Wang, Senling and Takahashi, Hiroshi and ya Kobayashi, Shin and Saluja, Kewal K.},
biburl = {https://www.bibsonomy.org/bibtex/21fd48ff6e9026ca87e548a63fbdaa32b/dblp},
ee = {http://search.ieice.org/bin/summary.php?id=e100-d_9_2224},
interhash = {b2e9a396952aa532425d1fed39d42142},
intrahash = {1fd48ff6e9026ca87e548a63fbdaa32b},
journal = {IEICE Trans. Inf. Syst.},
keywords = {dblp},
number = 9,
pages = {2224-2227},
timestamp = {2020-06-16T11:47:56.000+0200},
title = {A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line.},
url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet100d.html#HigamiWTKS17},
volume = {100-D},
year = 2017
}
