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%0 Journal Article
%1 journals/vlsisp/MaragosSLKDBAS17
%A Maragos, Konstantinos
%A Spatharakis, Christos
%A Lentaris, George
%A Kontzilas, Panagiotis
%A Dris, Stefanos
%A Bakopoulos, Paraskevas
%A Avramopoulos, Hercules
%A Soudris, Dimitrios
%D 2017
%J J. Signal Process. Syst.
%K dblp
%N 2
%P 107-125
%T A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s.
%U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp88.html#MaragosSLKDBAS17
%V 88
@article{journals/vlsisp/MaragosSLKDBAS17,
added-at = {2024-01-31T00:00:00.000+0100},
author = {Maragos, Konstantinos and Spatharakis, Christos and Lentaris, George and Kontzilas, Panagiotis and Dris, Stefanos and Bakopoulos, Paraskevas and Avramopoulos, Hercules and Soudris, Dimitrios},
biburl = {https://www.bibsonomy.org/bibtex/2ca1935ad4272165391afde99e7c9e5e2/dblp},
ee = {https://doi.org/10.1007/s11265-016-1201-y},
interhash = {b59136cccc32b0f6b4bcd0de75cd7714},
intrahash = {ca1935ad4272165391afde99e7c9e5e2},
journal = {J. Signal Process. Syst.},
keywords = {dblp},
number = 2,
pages = {107-125},
timestamp = {2024-04-09T03:12:10.000+0200},
title = {A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s.},
url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp88.html#MaragosSLKDBAS17},
volume = 88,
year = 2017
}