%0 Conference Paper %1 conf/reconfig/JacobyL16 %A Jacoby, Andres %A Llamocca, Daniel %B ReConFig %D 2016 %E Athanas, Peter M. %E Cumplido, René %E Feregrino, Claudia %E Sass, Ron %I IEEE %K dblp %P 1-8 %T Dual fixed-point CORDIC processor: Architecture and FPGA implementation. %U http://dblp.uni-trier.de/db/conf/reconfig/reconfig2016.html#JacobyL16 %@ 978-1-5090-3707-0

@inproceedings{conf/reconfig/JacobyL16, added-at = {2018-11-14T00:00:00.000+0100}, author = {Jacoby, Andres and Llamocca, Daniel}, biburl = {https://www.bibsonomy.org/bibtex/2ee8cfd52b2435e88aff3ed67cc652549/dblp}, booktitle = {ReConFig}, crossref = {conf/reconfig/2016}, editor = {Athanas, Peter M. and Cumplido, René and Feregrino, Claudia and Sass, Ron}, ee = {https://www.wikidata.org/entity/Q58208886}, interhash = {b619fb4c3f32cf29346539ebd0a7c90a}, intrahash = {ee8cfd52b2435e88aff3ed67cc652549}, isbn = {978-1-5090-3707-0}, keywords = {dblp}, pages = {1-8}, publisher = {IEEE}, timestamp = {2019-10-17T15:41:16.000+0200}, title = {Dual fixed-point CORDIC processor: Architecture and FPGA implementation.}, url = {http://dblp.uni-trier.de/db/conf/reconfig/reconfig2016.html#JacobyL16}, year = 2016 }