%0 Conference Paper %1 conf/aspdac/BextenTJMM15 %A zu Bexten, Volker Meyer %A Tristl, Markus %A Jerke, Göran %A Marquardt, Hartmut %A Medhat, Dina %B ASP-DAC %D 2015 %I IEEE %K dblp %P 447-453 %T Physical verification flow for hierarchical analog ic design constraints. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2015.html#BextenTJMM15 %@ 978-1-4799-7792-5

@inproceedings{conf/aspdac/BextenTJMM15, added-at = {2017-05-26T00:00:00.000+0200}, author = {zu Bexten, Volker Meyer and Tristl, Markus and Jerke, Göran and Marquardt, Hartmut and Medhat, Dina}, biburl = {https://www.bibsonomy.org/bibtex/23e9e0da06328d04aa143d28eed7aca22/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2015}, ee = {https://doi.org/10.1109/ASPDAC.2015.7059047}, interhash = {b690243e42a4d88bfd861978b95ddce5}, intrahash = {3e9e0da06328d04aa143d28eed7aca22}, isbn = {978-1-4799-7792-5}, keywords = {dblp}, pages = {447-453}, publisher = {IEEE}, timestamp = {2019-10-17T16:45:23.000+0200}, title = {Physical verification flow for hierarchical analog ic design constraints.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2015.html#BextenTJMM15}, year = 2015 }