%0 Journal Article %1 journals/jssc/KuoSLCC95 %A Kuo, James B. %A Su, K. W. %A Lou, J. H. %A Chen, S. S. %A Chiang, C. S. %D 1995 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 73-75 %T A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology. %U http://dblp.uni-trier.de/db/journals/jssc/jssc30.html#KuoSLCC95 %V 30

@article{journals/jssc/KuoSLCC95, added-at = {2023-05-03T00:00:00.000+0200}, author = {Kuo, James B. and Su, K. W. and Lou, J. H. and Chen, S. S. and Chiang, C. S.}, biburl = {https://www.bibsonomy.org/bibtex/28b216fbb6fdc08fa7dee844186ff5f2e/dblp}, ee = {https://doi.org/10.1109/4.350190}, interhash = {b8c8db50867d7ecf03a39b80c6615b99}, intrahash = {8b216fbb6fdc08fa7dee844186ff5f2e}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, month = {January}, number = 1, pages = {73-75}, timestamp = {2024-04-08T10:42:55.000+0200}, title = {A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc30.html#KuoSLCC95}, volume = 30, year = 1995 }