%0 Journal Article %1 journals/jssc/WongRY07 %A Wong, Jackie Koon Lun %A Rylyakov, Alexander V. %A Yang, Chih-Kong Ken %D 2007 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 881-888 %T A 5-mW 6-Gb/s Quarter-Rate Sampling Receiver With a 2-Tap DFE Using Soft Decisions. %U http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#WongRY07 %V 42

@article{journals/jssc/WongRY07, added-at = {2020-08-30T00:00:00.000+0200}, author = {Wong, Jackie Koon Lun and Rylyakov, Alexander V. and Yang, Chih-Kong Ken}, biburl = {https://www.bibsonomy.org/bibtex/263a15eaaa7e3f4eadea7585c5cef6814/dblp}, ee = {https://doi.org/10.1109/JSSC.2007.892189}, interhash = {bb85b9cad6bfcd9e692361d3f79f1804}, intrahash = {63a15eaaa7e3f4eadea7585c5cef6814}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {881-888}, timestamp = {2020-08-31T11:43:28.000+0200}, title = {A 5-mW 6-Gb/s Quarter-Rate Sampling Receiver With a 2-Tap DFE Using Soft Decisions.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#WongRY07}, volume = 42, year = 2007 }