%0 Conference Paper %1 conf/vts/YoonVCN98 %A Yoon, Heebyung %A Variyam, Pramodchandran N. %A Chatterjee, Abhijit %A Nagi, Naveena %B VTS %D 1998 %I IEEE Computer Society %K dblp %P 145-151 %T Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits. %U http://dblp.uni-trier.de/db/conf/vts/vts1998.html#YoonVCN98 %@ 0-8186-8436-4

@inproceedings{conf/vts/YoonVCN98, added-at = {2023-03-24T00:00:00.000+0100}, author = {Yoon, Heebyung and Variyam, Pramodchandran N. and Chatterjee, Abhijit and Nagi, Naveena}, biburl = {https://www.bibsonomy.org/bibtex/24fe3d685b5c1c8c26f32b4f7d1a3051a/dblp}, booktitle = {VTS}, crossref = {conf/vts/1998}, ee = {https://doi.ieeecomputersociety.org/10.1109/VTEST.1998.670862}, interhash = {bb8fc639e6d2598aef48b362ae268b39}, intrahash = {4fe3d685b5c1c8c26f32b4f7d1a3051a}, isbn = {0-8186-8436-4}, keywords = {dblp}, pages = {145-151}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T07:35:39.000+0200}, title = {Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits.}, url = {http://dblp.uni-trier.de/db/conf/vts/vts1998.html#YoonVCN98}, year = 1998 }