%0 Conference Paper %1 conf/fpl/ClarkeC06 %A Clarke, Jonathan A. %A Constantinides, George A. %B FPL %D 2006 %I IEEE %K dblp %P 1-2 %T High-Level Power Optimization for Digital Signal Processing in Reconfigurable Logic. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#ClarkeC06 %@ 1-4244-0312-X

@inproceedings{conf/fpl/ClarkeC06, added-at = {2019-10-19T00:00:00.000+0200}, author = {Clarke, Jonathan A. and Constantinides, George A.}, biburl = {https://www.bibsonomy.org/bibtex/2c33e6a0197dca6f676251bf7497cfb33/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2006}, ee = {https://doi.org/10.1109/FPL.2006.311353}, interhash = {c40c85bcb7b5e2dee3142db349e22269}, intrahash = {c33e6a0197dca6f676251bf7497cfb33}, isbn = {1-4244-0312-X}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2019-10-22T14:07:49.000+0200}, title = {High-Level Power Optimization for Digital Signal Processing in Reconfigurable Logic.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#ClarkeC06}, year = 2006 }