%0 Journal Article %1 journals/tc/PossaMHVM14 %A Possa, Paulo Ricardo %A Mahmoudi, Sidi Ahmed %A Harb, Naim %A Valderrama, Carlos %A Manneback, Pierre %D 2014 %J IEEE Trans. Computers %K dblp %N 10 %P 2376-2388 %T A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection. %U http://dblp.uni-trier.de/db/journals/tc/tc63.html#PossaMHVM14 %V 63

@article{journals/tc/PossaMHVM14, added-at = {2021-10-03T00:00:00.000+0200}, author = {Possa, Paulo Ricardo and Mahmoudi, Sidi Ahmed and Harb, Naim and Valderrama, Carlos and Manneback, Pierre}, biburl = {https://www.bibsonomy.org/bibtex/255da72beb079349ca0437debb39f1baa/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TC.2013.130}, interhash = {c7318cf212f5dcf1f48b2aa4662b4bc1}, intrahash = {55da72beb079349ca0437debb39f1baa}, journal = {IEEE Trans. Computers}, keywords = {dblp}, number = 10, pages = {2376-2388}, timestamp = {2024-04-08T18:30:01.000+0200}, title = {A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc63.html#PossaMHVM14}, volume = 63, year = 2014 }