%0 Journal Article %1 journals/jcsc/QianHYW18 %A Qian, Cheng %A Huang, Libo %A Yu, Qi %A Wang, Zhiying %D 2018 %J J. Circuits Syst. Comput. %K dblp %N 7 %P 1850114:1-1850114:34 %T CHAM: Improving Prefetch Efficiency Using a Composite Hierarchy-Aware Method. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc27.html#QianHYW18 %V 27

@article{journals/jcsc/QianHYW18, added-at = {2020-09-15T00:00:00.000+0200}, author = {Qian, Cheng and Huang, Libo and Yu, Qi and Wang, Zhiying}, biburl = {https://www.bibsonomy.org/bibtex/274fadf3c7e02dc91e2d22c339f7ec0b2/dblp}, ee = {https://doi.org/10.1142/S0218126618501141}, interhash = {cdeb1336208e8000c6a686f9e0b3a2d3}, intrahash = {74fadf3c7e02dc91e2d22c339f7ec0b2}, journal = {J. Circuits Syst. Comput.}, keywords = {dblp}, number = 7, pages = {1850114:1-1850114:34}, timestamp = {2020-09-16T11:40:16.000+0200}, title = {CHAM: Improving Prefetch Efficiency Using a Composite Hierarchy-Aware Method.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc27.html#QianHYW18}, volume = 27, year = 2018 }