%0 Conference Paper %1 conf/iscas/LuWL07 %A Lu, Chi-Chang %A Wu, Jyun-Yi %A Lee, Tsung-Sum %B ISCAS %D 2007 %I IEEE %K dblp %P 1955-1958 %T A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2007.html#LuWL07 %@ 1-4244-0921-7

@inproceedings{conf/iscas/LuWL07, added-at = {2016-05-20T00:00:00.000+0200}, author = {Lu, Chi-Chang and Wu, Jyun-Yi and Lee, Tsung-Sum}, biburl = {https://www.bibsonomy.org/bibtex/230cdc065e6964ca34219e8250b372ef7/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2007}, ee = {http://dx.doi.org/10.1109/ISCAS.2007.378359}, interhash = {d0abdfa0e898ef73c7e89830bf771a51}, intrahash = {30cdc065e6964ca34219e8250b372ef7}, isbn = {1-4244-0921-7}, keywords = {dblp}, pages = {1955-1958}, publisher = {IEEE}, timestamp = {2016-05-21T12:14:31.000+0200}, title = {A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2007.html#LuWL07}, year = 2007 }