%0 Journal Article %1 journals/tc/LamSC11 %A Lam, Siew Kei %A Srikanthan, Thambipillai %A Clarke, Christopher T. %D 2011 %J IEEE Trans. Computers %K dblp %N 5 %P 680-692 %T Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs. %U http://dblp.uni-trier.de/db/journals/tc/tc60.html#LamSC11 %V 60

@article{journals/tc/LamSC11, added-at = {2015-12-22T00:00:00.000+0100}, author = {Lam, Siew Kei and Srikanthan, Thambipillai and Clarke, Christopher T.}, biburl = {https://www.bibsonomy.org/bibtex/2fe4ba1b67d1d6b56cd38c9b64358e1c4/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TC.2010.237}, interhash = {d152d626b8bdc30a44dd5c049f6a5340}, intrahash = {fe4ba1b67d1d6b56cd38c9b64358e1c4}, journal = {IEEE Trans. Computers}, keywords = {dblp}, number = 5, pages = {680-692}, timestamp = {2015-12-24T11:54:55.000+0100}, title = {Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc60.html#LamSC11}, volume = 60, year = 2011 }