%0 Journal Article %1 journals/corr/abs-2401-16425 %A Rajeoni, Alireza Bagheri %D 2024 %J CoRR %K dblp %T Analog Circuit Sizing Using Machine Learning Based Transistor Circuit Model. %U http://dblp.uni-trier.de/db/journals/corr/corr2401.html#abs-2401-16425 %V abs/2401.16425

@article{journals/corr/abs-2401-16425, added-at = {2024-02-06T00:00:00.000+0100}, author = {Rajeoni, Alireza Bagheri}, biburl = {https://www.bibsonomy.org/bibtex/2d5cb777e0b45622255e1a754a9d3802e/dblp}, ee = {https://doi.org/10.48550/arXiv.2401.16425}, interhash = {d4d08db6c8ae1d00faa159657d3e7a5e}, intrahash = {d5cb777e0b45622255e1a754a9d3802e}, journal = {CoRR}, keywords = {dblp}, timestamp = {2024-04-08T21:54:40.000+0200}, title = {Analog Circuit Sizing Using Machine Learning Based Transistor Circuit Model.}, url = {http://dblp.uni-trier.de/db/journals/corr/corr2401.html#abs-2401-16425}, volume = {abs/2401.16425}, year = 2024 }