%0 Conference Paper %1 conf/iscas/FishY01 %A Fish, Alexander %A Yadid-Pecht, Orly %B ISCAS (3) %D 2001 %I IEEE %K dblp %P 636-639 %T CMOS current/voltage mode winner-take-all circuit with spatial filtering. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2001-3.html#FishY01 %@ 0-7803-6685-9

@inproceedings{conf/iscas/FishY01, added-at = {2022-10-02T00:00:00.000+0200}, author = {Fish, Alexander and Yadid-Pecht, Orly}, biburl = {https://www.bibsonomy.org/bibtex/2360d917a0ee0c4113bbb6282bf0f0d74/dblp}, booktitle = {ISCAS (3)}, crossref = {conf/iscas/2001}, ee = {https://doi.org/10.1109/ISCAS.2001.921391}, interhash = {d830c56683a328f194faa6594684cc09}, intrahash = {360d917a0ee0c4113bbb6282bf0f0d74}, isbn = {0-7803-6685-9}, keywords = {dblp}, pages = {636-639}, publisher = {IEEE}, timestamp = {2024-04-10T17:44:33.000+0200}, title = {CMOS current/voltage mode winner-take-all circuit with spatial filtering.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2001-3.html#FishY01}, year = 2001 }