A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.
P. Cadareanu, G. Gore, E. Giacomin, and P. Gaillardon. VLSI-SoC (Selected Papers), volume 586 of IFIP Advances in Information and Communication Technology, page 307-322. Springer, (2019)
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%0 Conference Paper
%1 conf/vlsi/CadareanuGGG19
%A Cadareanu, Patsy
%A Gore, Ganesh
%A Giacomin, Edouard
%A Gaillardon, Pierre-Emmanuel
%B VLSI-SoC (Selected Papers)
%D 2019
%E Metzler, Carolina
%E Gaillardon, Pierre-Emmanuel
%E Micheli, Giovanni De
%E Cárdenas, Carlos Silva
%E Reis, Ricardo
%I Springer
%K dblp
%P 307-322
%T A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.
%U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2019s.html#CadareanuGGG19
%V 586
%@ 978-3-030-53273-4
@inproceedings{conf/vlsi/CadareanuGGG19,
added-at = {2020-07-27T00:00:00.000+0200},
author = {Cadareanu, Patsy and Gore, Ganesh and Giacomin, Edouard and Gaillardon, Pierre-Emmanuel},
biburl = {https://www.bibsonomy.org/bibtex/2ba6e8f3e4d89466ebac02320c3577c35/dblp},
booktitle = {VLSI-SoC (Selected Papers)},
crossref = {conf/vlsi/2019socs},
editor = {Metzler, Carolina and Gaillardon, Pierre-Emmanuel and Micheli, Giovanni De and Cárdenas, Carlos Silva and Reis, Ricardo},
ee = {https://doi.org/10.1007/978-3-030-53273-4_14},
interhash = {df341ff2a4c9179d18c449874cd56f65},
intrahash = {ba6e8f3e4d89466ebac02320c3577c35},
isbn = {978-3-030-53273-4},
keywords = {dblp},
pages = {307-322},
publisher = {Springer},
series = {IFIP Advances in Information and Communication Technology},
timestamp = {2020-07-28T11:39:38.000+0200},
title = {A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.},
url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2019s.html#CadareanuGGG19},
volume = 586,
year = 2019
}
