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- BibTeX key
- journals/jssc/KhwaCWLSYCWLBKL17
- entry type
- article
- year
- 2017
- journal
- IEEE J. Solid State Circuits
- number
- 1
- pages
- 218-228
- volume
- 52
- ee
- https://doi.org/10.1109/JSSC.2016.2597822
- url
- http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#KhwaCWLSYCWLBKL17
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%1 journals/jssc/KhwaCWLSYCWLBKL17
%A Khwa, Win-San
%A Chang, Meng-Fan
%A Wu, Jau-Yi
%A Lee, Ming-Hsiu
%A Su, Tzu-Hsiang
%A Yang, Keng-Hao
%A Chen, Tien-Fu
%A Wang, Tien-Yen
%A Li, Hsiang-Pang
%A BrightSky, Matthew J.
%A Kim, SangBum
%A Lung, Hsiang-Lam
%A Lam, Chung
%D 2017
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 218-228
%T A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#KhwaCWLSYCWLBKL17
%V 52
@article{journals/jssc/KhwaCWLSYCWLBKL17,
added-at = {2020-08-30T00:00:00.000+0200},
author = {Khwa, Win-San and Chang, Meng-Fan and Wu, Jau-Yi and Lee, Ming-Hsiu and Su, Tzu-Hsiang and Yang, Keng-Hao and Chen, Tien-Fu and Wang, Tien-Yen and Li, Hsiang-Pang and BrightSky, Matthew J. and Kim, SangBum and Lung, Hsiang-Lam and Lam, Chung},
biburl = {https://www.bibsonomy.org/bibtex/2206b36188c0947ef7e7bd65c4ebaf0af/dblp},
ee = {https://doi.org/10.1109/JSSC.2016.2597822},
interhash = {e09c65c94b2b83fe85d89acb5b99c02a},
intrahash = {206b36188c0947ef7e7bd65c4ebaf0af},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {218-228},
timestamp = {2020-08-31T11:41:17.000+0200},
title = {A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#KhwaCWLSYCWLBKL17},
volume = 52,
year = 2017
}