%0 Journal Article %1 journals/vlsisp/KolagotlaYJ93 %A Kolagotla, Ravi K. %A sun Yu, Shu %A JáJá, Joseph F. %D 1993 %J J. VLSI Signal Process. %K dblp %N 2-3 %P 249-259 %T Systolic architectures for finite-state vector quantization. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp5.html#KolagotlaYJ93 %V 5

@article{journals/vlsisp/KolagotlaYJ93, added-at = {2021-07-02T00:00:00.000+0200}, author = {Kolagotla, Ravi K. and sun Yu, Shu and JáJá, Joseph F.}, biburl = {https://www.bibsonomy.org/bibtex/2b897d87ca7ec5b5493a69bf6193a4be3/dblp}, ee = {https://doi.org/10.1007/BF01581299}, interhash = {e1db6a4a06fbd96fc5d21fed193ac67c}, intrahash = {b897d87ca7ec5b5493a69bf6193a4be3}, journal = {J. VLSI Signal Process.}, keywords = {dblp}, number = {2-3}, pages = {249-259}, timestamp = {2024-04-09T03:12:16.000+0200}, title = {Systolic architectures for finite-state vector quantization.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp5.html#KolagotlaYJ93}, volume = 5, year = 1993 }