%0 Conference Paper %1 conf/dsd/HillerLS14 %A Hiller, Matthias %A Lima, Leandro Rodrigues %A Sigl, Georg %B DSD %D 2014 %I IEEE Computer Society %K %P 387-393 %T Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2014.html#HillerLS14 %@ 978-1-4799-5793-4

@inproceedings{conf/dsd/HillerLS14, added-at = {2023-12-14T15:12:00.000+0100}, author = {Hiller, Matthias and Lima, Leandro Rodrigues and Sigl, Georg}, biburl = {https://www.bibsonomy.org/bibtex/23234ba9125dea7c999207b8b60ab8802/admin}, booktitle = {DSD}, crossref = {conf/dsd/2014}, ee = {http://doi.ieeecomputersociety.org/10.1109/DSD.2014.33}, interhash = {e84627ed3dd54708658b49edbac4931c}, intrahash = {3234ba9125dea7c999207b8b60ab8802}, isbn = {978-1-4799-5793-4}, keywords = {}, pages = {387-393}, publisher = {IEEE Computer Society}, timestamp = {2023-12-14T15:12:00.000+0100}, title = {Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2014.html#HillerLS14}, year = 2014 }