%0 Conference Paper %1 conf/iscas/YoshidaYIA02 %A Yoshida, Hiroaki %A Yamaoka, Hiroaki %A Ikeda, Makoto %A Asada, Kunihiro %B ISCAS (3) %D 2002 %I IEEE %K dblp %P 373-376 %T Logic synthesis for PLA with 2-input logic elements. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2002-3.html#YoshidaYIA02 %@ 0-7803-7448-7

@inproceedings{conf/iscas/YoshidaYIA02, added-at = {2016-05-20T00:00:00.000+0200}, author = {Yoshida, Hiroaki and Yamaoka, Hiroaki and Ikeda, Makoto and Asada, Kunihiro}, biburl = {https://www.bibsonomy.org/bibtex/24af3772c86fed7b91b1b2d3ddea51fd3/dblp}, booktitle = {ISCAS (3)}, crossref = {conf/iscas/2002}, ee = {http://dx.doi.org/10.1109/ISCAS.2002.1010238}, interhash = {1f4c78c0ea83efec53dff3dba1e5d483}, intrahash = {4af3772c86fed7b91b1b2d3ddea51fd3}, isbn = {0-7803-7448-7}, keywords = {dblp}, pages = {373-376}, publisher = {IEEE}, timestamp = {2016-05-21T12:03:45.000+0200}, title = {Logic synthesis for PLA with 2-input logic elements.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2002-3.html#YoshidaYIA02}, year = 2002 }