%0 Conference Paper %1 conf/iscas/SakiyamaPV06 %A Sakiyama, Kazuo %A Preneel, Bart %A Verbauwhede, Ingrid %B ISCAS %D 2006 %I IEEE %K dblp %T A fast dual-field modular arithmetic logic unit and its hardware implementation. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#SakiyamaPV06 %@ 0-7803-9389-9

@inproceedings{conf/iscas/SakiyamaPV06, added-at = {2018-11-30T00:00:00.000+0100}, author = {Sakiyama, Kazuo and Preneel, Bart and Verbauwhede, Ingrid}, biburl = {https://www.bibsonomy.org/bibtex/2e1490ae5ae5f519f66346747fc924472/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2006}, ee = {https://doi.org/10.1109/ISCAS.2006.1692703}, interhash = {f6134f87580da4fdd4d0a4a5ee24ebcc}, intrahash = {e1490ae5ae5f519f66346747fc924472}, isbn = {0-7803-9389-9}, keywords = {dblp}, publisher = {IEEE}, timestamp = {2018-12-01T13:17:07.000+0100}, title = {A fast dual-field modular arithmetic logic unit and its hardware implementation.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#SakiyamaPV06}, year = 2006 }