%0 Journal Article %1 journals/mr/EjlaliM04 %A Ejlali, Alireza %A Miremadi, Seyed Ghassem %D 2004 %J Microelectron. Reliab. %K dblp %N 6 %P 1017-1028 %T FPGA-based Monte Carlo simulation for fault tree analysis. %U http://dblp.uni-trier.de/db/journals/mr/mr44.html#EjlaliM04 %V 44

@article{journals/mr/EjlaliM04, added-at = {2022-06-23T00:00:00.000+0200}, author = {Ejlali, Alireza and Miremadi, Seyed Ghassem}, biburl = {https://www.bibsonomy.org/bibtex/24ab29e91370dde774216425d5e278ae6/dblp}, ee = {https://doi.org/10.1016/j.microrel.2004.01.016}, interhash = {f809ef233fdfc27d60376ed2b65a117c}, intrahash = {4ab29e91370dde774216425d5e278ae6}, journal = {Microelectron. Reliab.}, keywords = {dblp}, number = 6, pages = {1017-1028}, timestamp = {2024-04-09T02:49:51.000+0200}, title = {FPGA-based Monte Carlo simulation for fault tree analysis.}, url = {http://dblp.uni-trier.de/db/journals/mr/mr44.html#EjlaliM04}, volume = 44, year = 2004 }