%0 Conference Paper %1 conf/vlsid/LuoJ02 %A Luo, Jiong %A Jha, Niraj K. %B ASP-DAC/VLSI Design %D 2002 %I IEEE Computer Society %K dblp %P 719- %T Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2002.html#LuoJ02 %@ 0-7695-1299-2

@inproceedings{conf/vlsid/LuoJ02, added-at = {2022-11-14T00:00:00.000+0100}, author = {Luo, Jiong and Jha, Niraj K.}, biburl = {https://www.bibsonomy.org/bibtex/2f96e37619579b8f590ab33bdb1279283/dblp}, booktitle = {ASP-DAC/VLSI Design}, crossref = {conf/vlsid/2002}, ee = {https://dl.acm.org/doi/10.5555/832284.835506}, interhash = {f896e86761ed571a2390697bd757c7a1}, intrahash = {f96e37619579b8f590ab33bdb1279283}, isbn = {0-7695-1299-2}, keywords = {dblp}, pages = {719-}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T01:05:13.000+0200}, title = {Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2002.html#LuoJ02}, year = 2002 }