%0 Journal Article %1 journals/tvlsi/CostagliolaCGIRSS12 %A Costagliola, Maurizio %A Caro, Davide De %A Girardi, Antonio %A Izzi, Roberto %A Rinaldi, Niccolò %A Spirito, M. %A Spirito, P. %D 2012 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 1 %P 162-166 %T An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi20.html#CostagliolaCGIRSS12 %V 20

@article{journals/tvlsi/CostagliolaCGIRSS12, added-at = {2024-02-12T00:00:00.000+0100}, author = {Costagliola, Maurizio and Caro, Davide De and Girardi, Antonio and Izzi, Roberto and Rinaldi, Niccolò and Spirito, M. and Spirito, P.}, biburl = {https://www.bibsonomy.org/bibtex/20b0e106a2a89e7a378caff5f777a9196/dblp}, ee = {https://doi.org/10.1109/TVLSI.2010.2090368}, interhash = {d970113266a3108ff203b3a124436010}, intrahash = {0b0e106a2a89e7a378caff5f777a9196}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 1, pages = {162-166}, timestamp = {2024-04-08T14:33:16.000+0200}, title = {An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi20.html#CostagliolaCGIRSS12}, volume = 20, year = 2012 }