%0 Conference Paper %1 conf/fpl/LiangZSCL15 %A Liang, Hao %A Zhang, Wei %A Sinha, Sharad %A Chen, Yi-Chung %A Li, Hai %B FPL %D 2015 %I IEEE %K dblp %P 1 %T Hierarchical library based power estimator for versatile FPGAs. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2015.html#LiangZSCL15 %@ 978-0-9934-2800-5

@inproceedings{conf/fpl/LiangZSCL15, added-at = {2018-11-08T00:00:00.000+0100}, author = {Liang, Hao and Zhang, Wei and Sinha, Sharad and Chen, Yi-Chung and Li, Hai}, biburl = {https://www.bibsonomy.org/bibtex/2f9a30b731816e954aa28828b18ddf866/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2015}, ee = {https://doi.org/10.1109/FPL.2015.7293969}, interhash = {20c73bde5b65df3cccff8ee63695d1e7}, intrahash = {f9a30b731816e954aa28828b18ddf866}, isbn = {978-0-9934-2800-5}, keywords = {dblp}, pages = 1, publisher = {IEEE}, timestamp = {2019-10-17T19:13:56.000+0200}, title = {Hierarchical library based power estimator for versatile FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2015.html#LiangZSCL15}, year = 2015 }