%0 Journal Article %1 journals/jcsc/TripathiR19 %A Tripathi, Abhishek N. %A Rajawat, Arvind %D 2019 %J Journal of Circuits, Systems, and Computers %K dblp %N 13 %P 1950218:1-1950218:13 %T Fast and Accurate System-Level Power Estimation Model for FPGA-Based Designs. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc28.html#TripathiR19 %V 28

@article{journals/jcsc/TripathiR19, added-at = {2020-02-06T00:00:00.000+0100}, author = {Tripathi, Abhishek N. and Rajawat, Arvind}, biburl = {https://www.bibsonomy.org/bibtex/21d1f0206f9b426b558472603ff0818b9/dblp}, ee = {https://doi.org/10.1142/S0218126619502189}, interhash = {bcb74512f428dc6836a52b592d914a27}, intrahash = {1d1f0206f9b426b558472603ff0818b9}, journal = {Journal of Circuits, Systems, and Computers}, keywords = {dblp}, number = 13, pages = {1950218:1-1950218:13}, timestamp = {2020-02-07T11:44:27.000+0100}, title = {Fast and Accurate System-Level Power Estimation Model for FPGA-Based Designs.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc28.html#TripathiR19}, volume = 28, year = 2019 }