%0 Journal Article %1 journals/cssp/MukherjeeBCDSR17 %A Mukherjee, Rohan %A Biswas, Baishik %A Chakrabarti, Indrajit %A Dutta, Pranab Kumar %A Sengupta, Somnath %A Ray, Ajoy Kumar %D 2017 %J CSSP %K dblp %N 2 %P 640-657 %T Speed-Area Optimized VLSI Architecture of Hexagonal Search Algorithm for Motion Estimation of (512×512) Frames. %U http://dblp.uni-trier.de/db/journals/cssp/cssp36.html#MukherjeeBCDSR17 %V 36

@article{journals/cssp/MukherjeeBCDSR17, added-at = {2017-02-13T00:00:00.000+0100}, author = {Mukherjee, Rohan and Biswas, Baishik and Chakrabarti, Indrajit and Dutta, Pranab Kumar and Sengupta, Somnath and Ray, Ajoy Kumar}, biburl = {https://www.bibsonomy.org/bibtex/22533f8ee75f25ac4678551ae2cd648d0/dblp}, ee = {http://dx.doi.org/10.1007/s00034-016-0315-6}, interhash = {60fb9ec5160689784f4818b86802579c}, intrahash = {2533f8ee75f25ac4678551ae2cd648d0}, journal = {CSSP}, keywords = {dblp}, number = 2, pages = {640-657}, timestamp = {2017-02-14T11:35:07.000+0100}, title = {Speed-Area Optimized VLSI Architecture of Hexagonal Search Algorithm for Motion Estimation of (512×512) Frames.}, url = {http://dblp.uni-trier.de/db/journals/cssp/cssp36.html#MukherjeeBCDSR17}, volume = 36, year = 2017 }